Digital ASIC Designer

European Organization for Nuclear Research

Location:
Geneva, Switzerland
Category:
Professional Staff
Posted Aug 12, 2026Apply by Sep 2, 2026 (10d left)
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Join CERN’s EP-ESE-ME section to develop a radiation-tolerant microcontroller ASIC for particle physics detectors and accelerator systems. The role involves full development cycle tasks including requirements definition, system architecture, implementation, verification, and post-silicon validation.

Responsibilities

  • Analyse application requirements across CERN's accelerator complex and particle physics detector systems to define technical specifications for the microcontroller ASIC.
  • Contribute to the architecture, design, and validation of a radiation-tolerant microcontroller ASIC implemented in 65 nm or 28 nm CMOS technology.
  • Support the definition of the SoC architecture, including the selection and configuration of an appropriate RISC-V processing core.
  • Design, integrate, and validate peripheral IP blocks within the CERN SOCRATES framework.
  • Apply fault-tolerant design methodologies, including triple modular redundancy (TMR) and single-event upset (SEU) mitigation techniques.
  • Participate in design verification activities and physical implementation, from RTL development through to tapeout.
  • Contribute to post-silicon testing, characterisation, and validation following chip fabrication.

Requirements

  • You are a national of a CERN Member State or Associate Member State (excluding Pakistani, Lithuanian, Latvian, Cypriot and Croatian nationals due to ceiling limits).
  • By the application deadline, you have a master’s degree with 2 to 6 years of professional experience since graduation or a PhD with a maximum of 3 years of professional experience since graduation.
  • You are not eligible with only a bachelor’s degree.
  • You have never had a CERN fellow or graduate contract before.
  • Strong understanding of digital logic design.
  • Solid experience with digital IC design and RTL development (Verilog/SystemVerilog).
  • Familiarity with standard ASIC design flows (synthesis, place and route, timing closure).
  • Knowledge of RISC-V architecture and its ecosystem.
  • Experience with microcontroller-based embedded systems development, including firmware programming in C and peripheral interfacing.
  • Your studies focused on Electronics Engineer.
  • RTL design and simulation (Verilog / SystemVerilog).
  • Familiarity with the digital ASIC design flow, including synthesis, place-and-route, timing closure, and sign-off activities.
  • Knowledge of fault-tolerant design techniques and radiation effects in CMOS circuits is an asset.
  • Microcontroller embedded systems development (firmware in C, peripheral interfacing, bare-metal programming).
  • Scripting and automation (Python or equivalent).
  • Linux/Unix working environment.
  • Spoken and written English, with a commitment to learn French.
  • Curiosity and willingness to learn in a multidisciplinary environment.
  • Ability to work independently as well as within a team.

Skills

  • Digital Logic Design
  • Digital IC Design
  • RTL Development
  • Verilog
  • SystemVerilog
  • ASIC Design Flow
  • Synthesis
  • Place and Route
  • Timing Closure
  • RISC-V architecture
  • Microcontroller Embedded Systems
  • Firmware Programming in C
  • Peripheral Interfacing
  • RTL Simulation
  • Fault-Tolerant Design
  • Radiation Effects in CMOS
  • Scripting for Automation
  • Python
  • Linux/Unix Environment

Languages

English, French